78#ifdef _CHIBIOS_RT_CONF_VER_6_1_
91 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
95 .cr2 = SPI_CR2_16BIT_MODE
98 { .port = GPIOD, .pad = 3 },
99 { .port = GPIOA, .pad = 9 },
100 { .port = GPIOG, .pad = 14 },
101 { .port = GPIOG, .pad = 5 }
110#ifdef _CHIBIOS_RT_CONF_VER_6_1_
123 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
127 .cr2 = SPI_CR2_16BIT_MODE
130 { .port = GPIOD, .pad = 2 },
131 { .port = GPIOG, .pad = 11 },
132 { .port = GPIOG, .pad = 3 },
133 { .port = GPIOG, .pad = 4 }
142#ifdef _CHIBIOS_RT_CONF_VER_6_1_
155 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
159 .cr2 = SPI_CR2_16BIT_MODE
162 { .port = GPIOG, .pad = 13 },
163 { .port = GPIOG, .pad = 12 },
164 { .port = GPIOG, .pad = 2 },
165 { .port = GPIOA, .pad = 8 }
174#ifdef _CHIBIOS_RT_CONF_VER_6_1_
187 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
191 .cr2 = SPI_CR2_16BIT_MODE
194 { .port = GPIOG, .pad = 6 },
195 { .port = GPIOF, .pad = 15 },
196 { .port =
nullptr, .pad = 0 },
197 { .port =
nullptr, .pad = 0 }