73 {
74 {
76 .spi_config = {
77 .circular = false,
78#ifdef _CHIBIOS_RT_CONF_VER_6_1_
79 .end_cb = nullptr,
80#else
81 .slave = false,
82 .data_cb = nullptr,
83 .error_cb = nullptr,
84#endif
85 .ssport = GPIOD,
86 .sspad = 4,
87 .cr1 =
88 SPI_CR1_16BIT_MODE |
89 SPI_CR1_SSM |
90 SPI_CR1_SSI |
91 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
92 SPI_CR1_MSTR |
93 SPI_CR1_CPHA |
94 0,
95 .cr2 = SPI_CR2_16BIT_MODE
96 },
97 .direct_io = {
98 { .port = GPIOD, .pad = 3 },
99 { .port = GPIOA, .pad = 9 },
100 { .port = GPIOG, .pad = 14 },
101 { .port = GPIOG, .pad = 5 }
102 },
105 },
106 {
108 .spi_config = {
109 .circular = false,
110#ifdef _CHIBIOS_RT_CONF_VER_6_1_
111 .end_cb = nullptr,
112#else
113 .slave = false,
114 .data_cb = nullptr,
115 .error_cb = nullptr,
116#endif
117 .ssport = GPIOD,
118 .sspad = 7,
119 .cr1 =
120 SPI_CR1_16BIT_MODE |
121 SPI_CR1_SSM |
122 SPI_CR1_SSI |
123 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
124 SPI_CR1_MSTR |
125 SPI_CR1_CPHA |
126 0,
127 .cr2 = SPI_CR2_16BIT_MODE
128 },
129 .direct_io = {
130 { .port = GPIOD, .pad = 2 },
131 { .port = GPIOG, .pad = 11 },
132 { .port = GPIOG, .pad = 3 },
133 { .port = GPIOG, .pad = 4 }
134 },
137 },
138 {
140 .spi_config = {
141 .circular = false,
142#ifdef _CHIBIOS_RT_CONF_VER_6_1_
143 .end_cb = nullptr,
144#else
145 .slave = false,
146 .data_cb = nullptr,
147 .error_cb = nullptr,
148#endif
149 .ssport = GPIOG,
150 .sspad = 10,
151 .cr1 =
152 SPI_CR1_16BIT_MODE |
153 SPI_CR1_SSM |
154 SPI_CR1_SSI |
155 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
156 SPI_CR1_MSTR |
157 SPI_CR1_CPHA |
158 0,
159 .cr2 = SPI_CR2_16BIT_MODE
160 },
161 .direct_io = {
162 { .port = GPIOG, .pad = 13 },
163 { .port = GPIOG, .pad = 12 },
164 { .port = GPIOG, .pad = 2 },
165 { .port = GPIOA, .pad = 8 }
166 },
169 },
170 {
172 .spi_config = {
173 .circular = false,
174#ifdef _CHIBIOS_RT_CONF_VER_6_1_
175 .end_cb = nullptr,
176#else
177 .slave = false,
178 .data_cb = nullptr,
179 .error_cb = nullptr,
180#endif
181 .ssport = GPIOG,
182 .sspad = 9,
183 .cr1 =
184 SPI_CR1_16BIT_MODE |
185 SPI_CR1_SSM |
186 SPI_CR1_SSI |
187 ((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) |
188 SPI_CR1_MSTR |
189 SPI_CR1_CPHA |
190 0,
191 .cr2 = SPI_CR2_16BIT_MODE
192 },
193 .direct_io = {
194 { .port = GPIOG, .pad = 6 },
195 { .port = GPIOF, .pad = 15 },
196 { .port = nullptr, .pad = 0 },
197 { .port = nullptr, .pad = 0 }
198 },
201 }
202 };
SPIDriver SPID2
SPI1 driver identifier.