rusEFI
The most advanced open source ECU
Loading...
Searching...
No Matches
fsl_acmp.h
Go to the documentation of this file.
1/*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#ifndef _FSL_ACMP_H_
10#define _FSL_ACMP_H_
11
12#include "fsl_common.h"
13
14/*!
15 * @addtogroup acmp
16 * @{
17 */
18
19/*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23/*! @name Driver version */
24/*@{*/
25/*! @brief ACMP driver version 2.0.4. */
26#define FSL_ACMP_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 4U))
27/*@}*/
28
29/*! @brief The mask of status flags cleared by writing 1. */
30#define CMP_C0_CFx_MASK (CMP_C0_CFR_MASK | CMP_C0_CFF_MASK)
31#define CMP_C1_CHNn_MASK 0xFF0000U /* C1_CHN0 - C1_CHN7. */
32#define CMP_C2_CHnF_MASK 0xFF0000U /* C2_CH0F - C2_CH7F. */
33
34/*! @brief Interrupt enable/disable mask. */
36{
37 kACMP_OutputRisingInterruptEnable = (1U << 0U), /*!< Enable the interrupt when comparator outputs rising. */
38 kACMP_OutputFallingInterruptEnable = (1U << 1U), /*!< Enable the interrupt when comparator outputs falling. */
39 kACMP_RoundRobinInterruptEnable = (1U << 2U), /*!< Enable the Round-Robin interrupt. */
40};
41
42/*! @brief Status flag mask. */
44{
45 kACMP_OutputRisingEventFlag = CMP_C0_CFR_MASK, /*!< Rising-edge on compare output has occurred. */
46 kACMP_OutputFallingEventFlag = CMP_C0_CFF_MASK, /*!< Falling-edge on compare output has occurred. */
47 kACMP_OutputAssertEventFlag = CMP_C0_COUT_MASK, /*!< Return the current value of the analog comparator output. */
48};
49
50#if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
51/*!
52 * @brief Comparator hard block offset control.
53 *
54 * If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port
55 * input in the positive direction (or negative port input crossing positive port input in the negative direction).
56 * Hysteresis still exists for positive port input crossing negative port input in the falling direction.
57 * If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.
58 */
60{
61 kACMP_OffsetLevel0 = 0U, /*!< The comparator hard block output has level 0 offset internally. */
62 kACMP_OffsetLevel1 = 1U, /*!< The comparator hard block output has level 1 offset internally. */
64#endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
65
66/*!
67 * @brief Comparator hard block hysteresis control.
68 *
69 * See chip data sheet to get the actual hysteresis value with each level.
70 */
72{
73 kACMP_HysteresisLevel0 = 0U, /*!< Offset is level 0 and Hysteresis is level 0. */
74 kACMP_HysteresisLevel1 = 1U, /*!< Offset is level 0 and Hysteresis is level 1. */
75 kACMP_HysteresisLevel2 = 2U, /*!< Offset is level 0 and Hysteresis is level 2. */
76 kACMP_HysteresisLevel3 = 3U, /*!< Offset is level 0 and Hysteresis is level 3. */
78
79/*! @brief CMP Voltage Reference source. */
81{
82 kACMP_VrefSourceVin1 = 0U, /*!< Vin1 is selected as resistor ladder network supply reference Vin. */
83 kACMP_VrefSourceVin2 = 1U, /*!< Vin2 is selected as resistor ladder network supply reference Vin. */
85
86#if defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U)
87/*! @brief Port input source. */
88typedef enum _acmp_port_input
89{
90 kACMP_PortInputFromDAC = 0U, /*!< Port input from the 8-bit DAC output. */
91 kACMP_PortInputFromMux = 1U, /*!< Port input from the analog 8-1 mux. */
93#endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
94
95/*! @brief Fixed mux port. */
96typedef enum _acmp_fixed_port
97{
98 kACMP_FixedPlusPort = 0U, /*!< Only the inputs to the Minus port are swept in each round. */
99 kACMP_FixedMinusPort = 1U, /*!< Only the inputs to the Plus port are swept in each round. */
101
102#if defined(FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT == 1U)
103/*! @brief Internal DAC's work mode. */
105{
106 kACMP_DACWorkLowSpeedMode = 0U, /*!< DAC is selected to work in low speed and low power mode. */
107 kACMP_DACWorkHighSpeedMode = 1U, /*!< DAC is selected to work in high speed high power mode. */
109#endif /* FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT */
110
111/*! @brief Configuration for ACMP. */
112typedef struct _acmp_config
113{
114#if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
115 acmp_offset_mode_t offsetMode; /*!< Offset mode. */
116#endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
117 acmp_hysteresis_mode_t hysteresisMode; /*!< Hysteresis mode. */
118 bool enableHighSpeed; /*!< Enable High Speed (HS) comparison mode. */
119 bool enableInvertOutput; /*!< Enable inverted comparator output. */
120 bool useUnfilteredOutput; /*!< Set compare output(COUT) to equal COUTA(true) or COUT(false). */
121 bool enablePinOut; /*!< The comparator output is available on the associated pin. */
123
124/*!
125 * @brief Configuration for channel.
126 *
127 * The comparator's port can be input from channel mux or DAC. If port input is from channel mux, detailed channel
128 * number for the mux should be configured.
129 */
131{
132#if defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U)
133 acmp_port_input_t positivePortInput; /*!< Input source of the comparator's positive port. */
134#endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
135 uint32_t plusMuxInput; /*!< Plus mux input channel(0~7). */
136#if defined(FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT == 1U)
137 acmp_port_input_t negativePortInput; /*!< Input source of the comparator's negative port. */
138#endif /* FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT */
139 uint32_t minusMuxInput; /*!< Minus mux input channel(0~7). */
141
142/*! @brief Configuration for filter. */
144{
145 bool enableSample; /*!< Using external SAMPLE as sampling clock input, or using divided bus clock. */
146 uint32_t filterCount; /*!< Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled. */
147 uint32_t filterPeriod; /*!< Filter Sample Period. The divider to bus clock. Available range is 0-255. */
149
150/*! @brief Configuration for DAC. */
151typedef struct _acmp_dac_config
152{
153 acmp_reference_voltage_source_t referenceVoltageSource; /*!< Supply voltage reference source. */
154 uint32_t DACValue; /*!< Value for DAC Output Voltage. Available range is 0-63. */
155
156#if defined(FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT == 1U)
157 bool enableOutput; /*!< Enable the DAC output. */
158#endif /* FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT */
159
160#if defined(FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT == 1U)
162#endif /* FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT */
164
165/*! @brief Configuration for round robin mode. */
167{
168 acmp_fixed_port_t fixedPort; /*!< Fixed mux port. */
169 uint32_t fixedChannelNumber; /*!< Indicates which channel is fixed in the fixed mux port. */
170 uint32_t checkerChannelMask; /*!< Mask of checker channel index. Available range is channel0:0x01 to channel7:0x80
171 for round-robin checker. */
172 uint32_t sampleClockCount; /*!< Specifies how many round-robin clock cycles(0~3) later the sample takes place. */
173 uint32_t delayModulus; /*!< Comparator and DAC initialization delay modulus. */
175
176#if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG == 1U)
177
178/*! @brief Discrete mode clock selection. */
180{
181 kACMP_DiscreteClockSlow = 0U, /*!< Slow clock (32kHz) is used as the discrete mode clock. */
182 kACMP_DiscreteClockFast = 1U, /*!< Fast clock (16-20MHz) is used as the discrete mode clock. */
184
185/*!
186 * @brief ACMP discrete sample selection.
187 * These values configures the analog comparator sampling timing (speicified by the discrete mode clock period T which
188 * is selected by #acmp_discrete_clock_source_t) in discrete mode.
189 */
191{
192 kACMP_DiscreteSampleTimeAs1T = 0U, /*!< The sampling time equals to 1xT. */
193 kACMP_DiscreteSampleTimeAs2T = 1U, /*!< The sampling time equals to 2xT. */
194 kACMP_DiscreteSampleTimeAs4T = 2U, /*!< The sampling time equals to 4xT. */
195 kACMP_DiscreteSampleTimeAs8T = 3U, /*!< The sampling time equals to 8xT. */
196 kACMP_DiscreteSampleTimeAs16T = 4U, /*!< The sampling time equals to 16xT. */
197 kACMP_DiscreteSampleTimeAs32T = 5U, /*!< The sampling time equals to 32xT. */
198 kACMP_DiscreteSampleTimeAs64T = 6U, /*!< The sampling time equals to 64xT. */
199 kACMP_DiscreteSampleTimeAs256T = 7U, /*!< The sampling time equals to 256xT. */
201
202/*!
203 * @brief ACMP discrete phase time selection.
204 * There are two phases for sampling input signals, phase 1 and phase 2.
205 */
207{
208 kACMP_DiscretePhaseTimeAlt0 = 0U, /*!< The phase x active in one sampling selection 0. */
209 kACMP_DiscretePhaseTimeAlt1 = 1U, /*!< The phase x active in one sampling selection 1. */
210 kACMP_DiscretePhaseTimeAlt2 = 2U, /*!< The phase x active in one sampling selection 2. */
211 kACMP_DiscretePhaseTimeAlt3 = 3U, /*!< The phase x active in one sampling selection 3. */
212 kACMP_DiscretePhaseTimeAlt4 = 4U, /*!< The phase x active in one sampling selection 4. */
213 kACMP_DiscretePhaseTimeAlt5 = 5U, /*!< The phase x active in one sampling selection 5. */
214 kACMP_DiscretePhaseTimeAlt6 = 6U, /*!< The phase x active in one sampling selection 6. */
215 kACMP_DiscretePhaseTimeAlt7 = 7U, /*!< The phase x active in one sampling selection 7. */
217
218/*! @brief Configuration for discrete mode. */
220{
221 bool enablePositiveChannelDiscreteMode; /*!< Positive Channel Continuous Mode Enable. By default, the continuous
222 mode is used. */
223 bool enableNegativeChannelDiscreteMode; /*!< Negative Channel Continuous Mode Enable. By default, the continuous
224 mode is used. */
225 bool enableResistorDivider; /*!< Resistor Divider Enable is used to enable the resistor divider for the inputs when
226 they come from 3v domain and their values are above 1.8v. */
227 acmp_discrete_clock_source_t clockSource; /*!< Select the clock source in order to generate the requiried timing for
228 comparator to work in discrete mode. */
229 acmp_discrete_sample_time_t sampleTime; /*!< Select the ACMP total sampling time period. */
230 acmp_discrete_phase_time_t phase1Time; /*!< Select the ACMP phase 1 sampling time. */
231 acmp_discrete_phase_time_t phase2Time; /*!< Select the ACMP phase 2 sampling time. */
233
234#endif /* FSL_FEATURE_ACMP_HAS_C3_REG */
235
236#if defined(__cplusplus)
237extern "C" {
238#endif
239
240/*******************************************************************************
241 * API
242 ******************************************************************************/
243
244/*!
245 * @name Initialization and deinitialization
246 * @{
247 */
248
249/*!
250 * @brief Initializes the ACMP.
251 *
252 * The default configuration can be got by calling ACMP_GetDefaultConfig().
253 *
254 * @param base ACMP peripheral base address.
255 * @param config Pointer to ACMP configuration structure.
256 */
257void ACMP_Init(CMP_Type *base, const acmp_config_t *config);
258
259/*!
260 * @brief Deinitializes the ACMP.
261 *
262 * @param base ACMP peripheral base address.
263 */
264void ACMP_Deinit(CMP_Type *base);
265
266/*!
267 * @brief Gets the default configuration for ACMP.
268 *
269 * This function initializes the user configuration structure to default value. The default value are:
270 *
271 * Example:
272 @code
273 config->enableHighSpeed = false;
274 config->enableInvertOutput = false;
275 config->useUnfilteredOutput = false;
276 config->enablePinOut = false;
277 config->enableHysteresisBothDirections = false;
278 config->hysteresisMode = kACMP_hysteresisMode0;
279 @endcode
280 *
281 * @param config Pointer to ACMP configuration structure.
282 */
284
285/* @} */
286
287/*!
288 * @name Basic Operations
289 * @{
290 */
291
292/*!
293 * @brief Enables or disables the ACMP.
294 *
295 * @param base ACMP peripheral base address.
296 * @param enable True to enable the ACMP.
297 */
298void ACMP_Enable(CMP_Type *base, bool enable);
299
300#if defined(FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT) && (FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT == 1U)
301/*!
302 * @brief Enables the link from CMP to DAC enable.
303 *
304 * When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].
305 *
306 * @param base ACMP peripheral base address.
307 * @param enable Enable the feature or not.
308 */
309void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable);
310#endif /* FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT */
311
312/*!
313 * @brief Sets the channel configuration.
314 *
315 * Note that the plus/minus mux's setting is only valid when the positive/negative port's input isn't from DAC but
316 * from channel mux.
317 *
318 * Example:
319 @code
320 acmp_channel_config_t configStruct = {0};
321 configStruct.positivePortInput = kACMP_PortInputFromDAC;
322 configStruct.negativePortInput = kACMP_PortInputFromMux;
323 configStruct.minusMuxInput = 1U;
324 ACMP_SetChannelConfig(CMP0, &configStruct);
325 @endcode
326 *
327 * @param base ACMP peripheral base address.
328 * @param config Pointer to channel configuration structure.
329 */
330void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config);
331
332/* @} */
333
334/*!
335 * @name Advanced Operations
336 * @{
337 */
338
339/*!
340 * @brief Enables or disables DMA.
341 *
342 * @param base ACMP peripheral base address.
343 * @param enable True to enable DMA.
344 */
345void ACMP_EnableDMA(CMP_Type *base, bool enable);
346
347/*!
348 * @brief Enables or disables window mode.
349 *
350 * @param base ACMP peripheral base address.
351 * @param enable True to enable window mode.
352 */
353void ACMP_EnableWindowMode(CMP_Type *base, bool enable);
354
355/*!
356 * @brief Configures the filter.
357 *
358 * The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample
359 * clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed
360 * usage can be got from the reference manual.
361 *
362 * Example:
363 @code
364 acmp_filter_config_t configStruct = {0};
365 configStruct.filterCount = 5U;
366 configStruct.filterPeriod = 200U;
367 configStruct.enableSample = false;
368 ACMP_SetFilterConfig(CMP0, &configStruct);
369 @endcode
370 *
371 * @param base ACMP peripheral base address.
372 * @param config Pointer to filter configuration structure.
373 */
374void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config);
375
376/*!
377 * @brief Configures the internal DAC.
378 *
379 * Example:
380 @code
381 acmp_dac_config_t configStruct = {0};
382 configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
383 configStruct.DACValue = 20U;
384 configStruct.enableOutput = false;
385 configStruct.workMode = kACMP_DACWorkLowSpeedMode;
386 ACMP_SetDACConfig(CMP0, &configStruct);
387 @endcode
388 *
389 * @param base ACMP peripheral base address.
390 * @param config Pointer to DAC configuration structure. "NULL" is for disabling the feature.
391 */
392void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config);
393
394/*!
395 * @brief Configures the round robin mode.
396 *
397 * Example:
398 @code
399 acmp_round_robin_config_t configStruct = {0};
400 configStruct.fixedPort = kACMP_FixedPlusPort;
401 configStruct.fixedChannelNumber = 3U;
402 configStruct.checkerChannelMask = 0xF7U;
403 configStruct.sampleClockCount = 0U;
404 configStruct.delayModulus = 0U;
405 ACMP_SetRoundRobinConfig(CMP0, &configStruct);
406 @endcode
407 * @param base ACMP peripheral base address.
408 * @param config Pointer to round robin mode configuration structure. "NULL" is for disabling the feature.
409 */
411
412/*!
413 * @brief Defines the pre-set state of channels in round robin mode.
414 *
415 * Note: The pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits.
416 * So get-round-robin-result can't return the same value as the value are set by pre-state.
417 *
418 * @param base ACMP peripheral base address.
419 * @param mask Mask of round robin channel index. Available range is channel0:0x01 to channel7:0x80.
420 */
421void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask);
422
423/*!
424 * @brief Gets the channel input changed flags in round robin mode.
425 *
426 * @param base ACMP peripheral base address.
427 * @return Mask of channel input changed asserted flags. Available range is channel0:0x01 to channel7:0x80.
428 */
429static inline uint32_t ACMP_GetRoundRobinStatusFlags(CMP_Type *base)
430{
431 return (((base->C2) & CMP_C2_CHnF_MASK) >> CMP_C2_CH0F_SHIFT);
432}
433
434/*!
435 * @brief Clears the channel input changed flags in round robin mode.
436 *
437 * @param base ACMP peripheral base address.
438 * @param mask Mask of channel index. Available range is channel0:0x01 to channel7:0x80.
439 */
440void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask);
441
442/*!
443 * @brief Gets the round robin result.
444 *
445 * Note that the set-pre-state has different circuit with get-round-robin-result in the SOC even though they are same
446 * bits. So ACMP_GetRoundRobinResult() can't return the same value as the value are set by ACMP_SetRoundRobinPreState.
447
448 * @param base ACMP peripheral base address.
449 * @return Mask of round robin channel result. Available range is channel0:0x01 to channel7:0x80.
450 */
451static inline uint32_t ACMP_GetRoundRobinResult(CMP_Type *base)
452{
453 return ((base->C2 & CMP_C2_ACOn_MASK) >> CMP_C2_ACOn_SHIFT);
454}
455
456/* @} */
457
458/*!
459 * @name Interrupts
460 * @{
461 */
462
463/*!
464 * @brief Enables interrupts.
465 *
466 * @param base ACMP peripheral base address.
467 * @param mask Interrupts mask. See "_acmp_interrupt_enable".
468 */
469void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask);
470
471/*!
472 * @brief Disables interrupts.
473 *
474 * @param base ACMP peripheral base address.
475 * @param mask Interrupts mask. See "_acmp_interrupt_enable".
476 */
477void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask);
478
479/* @} */
480
481/*!
482 * @name Status
483 * @{
484 */
485
486/*!
487 * @brief Gets status flags.
488 *
489 * @param base ACMP peripheral base address.
490 * @return Status flags asserted mask. See "_acmp_status_flags".
491 */
492uint32_t ACMP_GetStatusFlags(CMP_Type *base);
493
494/*!
495 * @brief Clears status flags.
496 *
497 * @param base ACMP peripheral base address.
498 * @param mask Status flags mask. See "_acmp_status_flags".
499 */
500void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask);
501
502/* @} */
503
504#if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG == 1U)
505/*!
506 * @name Discrete mode
507 * @{
508 */
509
510/*!
511 * @brief Configure the discrete mode.
512 *
513 * Configure the discrete mode when supporting 3V domain with 1.8V core.
514 *
515 * @param base ACMP peripheral base address.
516 * @param config Pointer to configuration structure. See "acmp_discrete_mode_config_t".
517 */
519
520/*!
521 * @brief Get the default configuration for discrete mode setting.
522 *
523 * @param config Pointer to configuration structure to be restored with the setting values.
524 */
526
527/* @} */
528#endif /* FSL_FEATURE_ACMP_HAS_C3_REG */
529
530#if defined(__cplusplus)
531}
532#endif
533
534/*! @}*/
535
536#endif /* _FSL_ACMP_H_ */
static constexpr persistent_config_s * config
struct _acmp_channel_config acmp_channel_config_t
Configuration for channel.
_acmp_discrete_sample_time
ACMP discrete sample selection. These values configures the analog comparator sampling timing (speici...
Definition fsl_acmp.h:191
_acmp_interrupt_enable
Interrupt enable/disable mask.
Definition fsl_acmp.h:36
void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)
Configures the filter.
Definition fsl_acmp.c:315
acmp_hysteresis_mode_t hysteresisMode
Definition fsl_acmp.h:117
void ACMP_Enable(CMP_Type *base, bool enable)
Enables or disables the ACMP.
Definition fsl_acmp.c:172
void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)
Get the default configuration for discrete mode setting.
Definition fsl_acmp.c:645
static uint32_t ACMP_GetRoundRobinResult(CMP_Type *base)
Gets the round robin result.
Definition fsl_acmp.h:451
acmp_offset_mode_t offsetMode
Definition fsl_acmp.h:115
uint32_t ACMP_GetStatusFlags(CMP_Type *base)
Gets status flags.
Definition fsl_acmp.c:559
struct _acmp_discrete_mode_config acmp_discrete_mode_config_t
Configuration for discrete mode.
void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask)
Defines the pre-set state of channels in round robin mode.
Definition fsl_acmp.c:453
acmp_discrete_phase_time_t phase1Time
Definition fsl_acmp.h:230
bool enableHighSpeed
Definition fsl_acmp.h:118
void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)
Sets the channel configuration.
Definition fsl_acmp.c:230
uint32_t minusMuxInput
Definition fsl_acmp.h:139
enum _acmp_reference_voltage_source acmp_reference_voltage_source_t
CMP Voltage Reference source.
acmp_discrete_clock_source_t clockSource
Definition fsl_acmp.h:227
acmp_discrete_phase_time_t phase2Time
Definition fsl_acmp.h:231
_acmp_reference_voltage_source
CMP Voltage Reference source.
Definition fsl_acmp.h:81
_acmp_hysteresis_mode
Comparator hard block hysteresis control.
Definition fsl_acmp.h:72
static uint32_t ACMP_GetRoundRobinStatusFlags(CMP_Type *base)
Gets the channel input changed flags in round robin mode.
Definition fsl_acmp.h:429
bool enableInvertOutput
Definition fsl_acmp.h:119
bool enablePinOut
Definition fsl_acmp.h:121
_acmp_discrete_phase_time
ACMP discrete phase time selection. There are two phases for sampling input signals,...
Definition fsl_acmp.h:207
enum _acmp_discrete_phase_time acmp_discrete_phase_time_t
ACMP discrete phase time selection. There are two phases for sampling input signals,...
acmp_port_input_t positivePortInput
Definition fsl_acmp.h:133
enum _acmp_dac_work_mode acmp_dac_work_mode_t
Internal DAC's work mode.
uint32_t DACValue
Definition fsl_acmp.h:154
struct _acmp_filter_config acmp_filter_config_t
Configuration for filter.
acmp_discrete_sample_time_t sampleTime
Definition fsl_acmp.h:229
void ACMP_Init(CMP_Type *base, const acmp_config_t *config)
Initializes the ACMP.
Definition fsl_acmp.c:70
_acmp_discrete_clock_source
Discrete mode clock selection.
Definition fsl_acmp.h:180
struct _acmp_config acmp_config_t
Configuration for ACMP.
_acmp_port_input
Port input source.
Definition fsl_acmp.h:89
void ACMP_EnableDMA(CMP_Type *base, bool enable)
Enables or disables DMA.
Definition fsl_acmp.c:260
uint32_t filterPeriod
Definition fsl_acmp.h:147
enum _acmp_hysteresis_mode acmp_hysteresis_mode_t
Comparator hard block hysteresis control.
struct _acmp_dac_config acmp_dac_config_t
Configuration for DAC.
_acmp_dac_work_mode
Internal DAC's work mode.
Definition fsl_acmp.h:105
void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask)
Clears the channel input changed flags in round robin mode.
Definition fsl_acmp.c:470
void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)
Disables interrupts.
Definition fsl_acmp.c:522
void ACMP_Deinit(CMP_Type *base)
Deinitializes the ACMP.
Definition fsl_acmp.c:120
acmp_port_input_t negativePortInput
Definition fsl_acmp.h:137
_acmp_offset_mode
Comparator hard block offset control.
Definition fsl_acmp.h:60
uint32_t plusMuxInput
Definition fsl_acmp.h:135
enum _acmp_port_input acmp_port_input_t
Port input source.
_acmp_status_flags
Status flag mask.
Definition fsl_acmp.h:44
void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)
Configures the internal DAC.
Definition fsl_acmp.c:348
bool useUnfilteredOutput
Definition fsl_acmp.h:120
_acmp_fixed_port
Fixed mux port.
Definition fsl_acmp.h:97
enum _acmp_offset_mode acmp_offset_mode_t
Comparator hard block offset control.
void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)
Enables interrupts.
Definition fsl_acmp.c:485
void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)
Enables the link from CMP to DAC enable.
Definition fsl_acmp.c:196
acmp_reference_voltage_source_t referenceVoltageSource
Definition fsl_acmp.h:153
enum _acmp_discrete_sample_time acmp_discrete_sample_time_t
ACMP discrete sample selection. These values configures the analog comparator sampling timing (speici...
void ACMP_EnableWindowMode(CMP_Type *base, bool enable)
Enables or disables window mode.
Definition fsl_acmp.c:281
acmp_fixed_port_t fixedPort
Definition fsl_acmp.h:168
void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)
Clears status flags.
Definition fsl_acmp.c:589
void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)
Configure the discrete mode.
Definition fsl_acmp.c:615
enum _acmp_fixed_port acmp_fixed_port_t
Fixed mux port.
enum _acmp_discrete_clock_source acmp_discrete_clock_source_t
Discrete mode clock selection.
struct _acmp_round_robin_config acmp_round_robin_config_t
Configuration for round robin mode.
void ACMP_GetDefaultConfig(acmp_config_t *config)
Gets the default configuration for ACMP.
Definition fsl_acmp.c:148
acmp_dac_work_mode_t workMode
Definition fsl_acmp.h:161
void ACMP_SetRoundRobinConfig(CMP_Type *base, const acmp_round_robin_config_t *config)
Configures the round robin mode.
Definition fsl_acmp.c:406
uint32_t filterCount
Definition fsl_acmp.h:146
@ kACMP_DiscreteSampleTimeAs64T
Definition fsl_acmp.h:198
@ kACMP_DiscreteSampleTimeAs2T
Definition fsl_acmp.h:193
@ kACMP_DiscreteSampleTimeAs256T
Definition fsl_acmp.h:199
@ kACMP_DiscreteSampleTimeAs1T
Definition fsl_acmp.h:192
@ kACMP_DiscreteSampleTimeAs16T
Definition fsl_acmp.h:196
@ kACMP_DiscreteSampleTimeAs8T
Definition fsl_acmp.h:195
@ kACMP_DiscreteSampleTimeAs4T
Definition fsl_acmp.h:194
@ kACMP_DiscreteSampleTimeAs32T
Definition fsl_acmp.h:197
@ kACMP_RoundRobinInterruptEnable
Definition fsl_acmp.h:39
@ kACMP_OutputFallingInterruptEnable
Definition fsl_acmp.h:38
@ kACMP_OutputRisingInterruptEnable
Definition fsl_acmp.h:37
@ kACMP_VrefSourceVin2
Definition fsl_acmp.h:83
@ kACMP_VrefSourceVin1
Definition fsl_acmp.h:82
@ kACMP_HysteresisLevel2
Definition fsl_acmp.h:75
@ kACMP_HysteresisLevel1
Definition fsl_acmp.h:74
@ kACMP_HysteresisLevel0
Definition fsl_acmp.h:73
@ kACMP_HysteresisLevel3
Definition fsl_acmp.h:76
@ kACMP_DiscretePhaseTimeAlt2
Definition fsl_acmp.h:210
@ kACMP_DiscretePhaseTimeAlt0
Definition fsl_acmp.h:208
@ kACMP_DiscretePhaseTimeAlt1
Definition fsl_acmp.h:209
@ kACMP_DiscretePhaseTimeAlt7
Definition fsl_acmp.h:215
@ kACMP_DiscretePhaseTimeAlt3
Definition fsl_acmp.h:211
@ kACMP_DiscretePhaseTimeAlt4
Definition fsl_acmp.h:212
@ kACMP_DiscretePhaseTimeAlt6
Definition fsl_acmp.h:214
@ kACMP_DiscretePhaseTimeAlt5
Definition fsl_acmp.h:213
@ kACMP_DiscreteClockSlow
Definition fsl_acmp.h:181
@ kACMP_DiscreteClockFast
Definition fsl_acmp.h:182
@ kACMP_PortInputFromDAC
Definition fsl_acmp.h:90
@ kACMP_PortInputFromMux
Definition fsl_acmp.h:91
@ kACMP_DACWorkHighSpeedMode
Definition fsl_acmp.h:107
@ kACMP_DACWorkLowSpeedMode
Definition fsl_acmp.h:106
@ kACMP_OffsetLevel0
Definition fsl_acmp.h:61
@ kACMP_OffsetLevel1
Definition fsl_acmp.h:62
@ kACMP_OutputAssertEventFlag
Definition fsl_acmp.h:47
@ kACMP_OutputFallingEventFlag
Definition fsl_acmp.h:46
@ kACMP_OutputRisingEventFlag
Definition fsl_acmp.h:45
@ kACMP_FixedPlusPort
Definition fsl_acmp.h:98
@ kACMP_FixedMinusPort
Definition fsl_acmp.h:99
static void enable(const char *param)
Definition settings.cpp:441
Configuration for channel.
Definition fsl_acmp.h:131
Configuration for ACMP.
Definition fsl_acmp.h:113
Configuration for DAC.
Definition fsl_acmp.h:152
Configuration for discrete mode.
Definition fsl_acmp.h:220
Configuration for filter.
Definition fsl_acmp.h:144
Configuration for round robin mode.
Definition fsl_acmp.h:167