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hw_layer
ports
stm32
stm32f4
dfu_init.h
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/*
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* dfu_init.h
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*
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* @date Aug 3, 2019
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#ifndef HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
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#define HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
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LDR
R0
, =0x40023844
// RCC_APB2ENR
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LDR
R1
, =0x00004000
// ENABLE SYSCFG CLOCK
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STR
R1
, [
R0
, #0]
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LDR
R0
, =0x40013800
// SYSCFG_MEMRMP
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LDR
R1
, =0x00000001
// MAP ROM AT ZERO
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STR
R1
, [
R0
, #0]
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LDR
R0
, =0x1FFF0000
// ROM BASE
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LDR
SP
,[
R0
, #0]
// SP @ +0
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LDR
R0
,[
R0
, #4]
// PC @ +4
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#endif
/* HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_ */
R0
LDR R0
Definition
dfu_init.h:11
R1
LDR R1
Definition
dfu_init.h:12
SP
LDR LDR SP
Definition
dfu_init.h:15
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