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rusefi_hw_stm32_enums.h
Go to the documentation of this file.
1#pragma once
2
3/**
4 * Hardware pin. This enum is platform-specific.
5 */
6enum class Gpio : uint16_t {
7 Unassigned = 0,
8 // only used as return value of 'parseBrainPin' function do we really this this logic special value at all?!
9 Invalid = 1,
10
11 A0 = 2,
12 A1 = 3,
13 A2 = 4,
14 A3 = 5,
15 A4 = 6,
16 A5 = 7,
17 A6 = 8,
18 A7 = 9,
19 A8 = 10,
20 A9 = 11,
21 A10 = 12,
22 A11 = 13,
23 A12 = 14,
24 A13 = 15,
25 A14 = 16,
26 A15 = 17,
27
28 B0 = 18,
29 B1 = 19,
30 B2 = 20,
31 B3 = 21,
32 B4 = 22,
33 B5 = 23,
34 B6 = 24,
35 B7 = 25,
36 B8 = 26,
37 B9 = 27,
38 B10 = 28,
39 B11 = 29,
40 B12 = 30,
41 B13 = 31,
42 B14 = 32,
43 B15 = 33,
44
45 C0 = 34,
46 C1 = 35,
47 C2 = 36,
48 C3 = 37,
49 C4 = 38,
50 C5 = 39,
51 C6 = 40,
52 C7 = 41,
53 C8 = 42,
54 C9 = 43,
55 C10 = 44,
56 C11 = 45,
57 C12 = 46,
58 C13 = 47,
59 C14 = 48,
60 C15 = 49,
61
62 D0 = 50,
63 D1 = 51,
64 D2 = 52,
65 D3 = 53,
66 D4 = 54,
67 D5 = 55,
68 D6 = 56,
69 D7 = 57,
70 D8 = 58,
71 D9 = 59,
72 D10 = 60,
73 D11 = 61,
74 D12 = 62,
75 D13 = 63,
76 D14 = 64,
77 D15 = 65,
78
79 E0 = 66,
80 E1 = 67,
81 E2 = 68,
82 E3 = 69,
83 E4 = 70,
84 E5 = 71,
85 E6 = 72,
86 E7 = 73,
87 E8 = 74,
88 E9 = 75,
89 E10 = 76,
90 E11 = 77,
91 E12 = 78,
92 E13 = 79,
93 E14 = 80,
94 E15 = 81,
95
96 F0 = 82,
97 F1 = 83,
98 F2 = 84,
99 F3 = 85,
100 F4 = 86,
101 F5 = 87,
102 F6 = 88,
103 F7 = 89,
104 F8 = 90,
105 F9 = 91,
106 F10 = 92,
107 F11 = 93,
108 F12 = 94,
109 F13 = 95,
110 F14 = 96,
111 F15 = 97,
112
113 G0 = 98,
114 G1 = 99,
115 G2 = 100,
116 G3 = 101,
117 G4 = 102,
118 G5 = 103,
119 G6 = 104,
120 G7 = 105,
121 G8 = 106,
122 G9 = 107,
123 G10 = 108,
124 G11 = 109,
125 G12 = 110,
126 G13 = 111,
127 G14 = 112,
128 G15 = 113,
129
130 H0 = 114,
131 H1 = 115,
132 H2 = 116,
133 H3 = 117,
134 H4 = 118,
135 H5 = 119,
136 H6 = 120,
137 H7 = 121,
138 H8 = 122,
139 H9 = 123,
140 H10 = 124,
141 H11 = 125,
142 H12 = 126,
143 H13 = 127,
144 H14 = 128,
145 H15 = 129,
146
147 /* Used by 176-pin STM32 MCUs */
148 I0 = 130,
149 I1 = 131,
150 I2 = 132,
151 I3 = 133,
152 I4 = 134,
153 I5 = 135,
154 I6 = 136,
155 I7 = 137,
156 I8 = 138,
157 I9 = 139,
158 I10 = 140,
159 I11 = 141,
160 I12 = 142,
161 I13 = 143,
162 I14 = 144,
163 I15 = 145,
164
165 /* Used by 208-pin STM32 MCUs */
166 J0 = 146,
167 J1 = 147,
168 J2 = 148,
169 J3 = 149,
170 J4 = 150,
171 J5 = 151,
172 J6 = 152,
173 J7 = 153,
174 J8 = 154,
175 J9 = 155,
176 J10 = 156,
177 J11 = 157,
178 J12 = 158,
179 J13 = 159,
180 J14 = 160,
181 J15 = 161,
182
183K0 = 162,
184K1 = 163,
185K2 = 164,
186K3 = 165,
187K4 = 166,
188K5 = 167,
189K6 = 168,
190K7 = 169,
191K8 = 170,
192K9 = 171,
193K10 = 172,
194K11 = 173,
195K12 = 174,
196K13 = 175,
197K14 = 176,
198K15 = 177,
199
200MC33972_PIN_1 = 178,
201MC33972_PIN_2 = 179,
202MC33972_PIN_3 = 180,
203MC33972_PIN_4 = 181,
204MC33972_PIN_5 = 182,
205MC33972_PIN_6 = 183,
206MC33972_PIN_7 = 184,
207MC33972_PIN_8 = 185,
208MC33972_PIN_9 = 186,
209MC33972_PIN_10 = 187,
210MC33972_PIN_11 = 188,
211MC33972_PIN_12 = 189,
212MC33972_PIN_13 = 190,
213MC33972_PIN_14 = 191,
214MC33972_PIN_15 = 192,
215MC33972_PIN_16 = 193,
216MC33972_PIN_17 = 194,
217MC33972_PIN_18 = 195,
218MC33972_PIN_19 = 196,
219MC33972_PIN_20 = 197,
220MC33972_PIN_21 = 198,
221MC33972_PIN_22 = 199,
222
223TLE8888_PIN_1 = 200,
224TLE8888_PIN_2 = 201,
225TLE8888_PIN_3 = 202,
226TLE8888_PIN_4 = 203,
227TLE8888_PIN_5 = 204,
228TLE8888_PIN_6 = 205,
229TLE8888_PIN_7 = 206,
230TLE8888_PIN_8 = 207,
231TLE8888_PIN_9 = 208,
232TLE8888_PIN_10 = 209,
233TLE8888_PIN_11 = 210,
234TLE8888_PIN_12 = 211,
235TLE8888_PIN_13 = 212,
236TLE8888_PIN_14 = 213,
237TLE8888_PIN_15 = 214,
238TLE8888_PIN_16 = 215,
239TLE8888_PIN_17 = 216,
240TLE8888_PIN_18 = 217,
241TLE8888_PIN_19 = 218,
242TLE8888_PIN_20 = 219,
243TLE8888_PIN_21 = 220,
244TLE8888_PIN_22 = 221,
245TLE8888_PIN_23 = 222,
246TLE8888_PIN_24 = 223,
247TLE8888_PIN_25 = 224,
248TLE8888_PIN_26 = 225,
249TLE8888_PIN_27 = 226,
250TLE8888_PIN_28 = 227,
251TLE8888_PIN_MR = 228,
252TLE8888_PIN_KEY = 229,
253TLE8888_PIN_WAKE = 230,
254
255TLE6240_PIN_1 = 231,
256TLE6240_PIN_2 = 232,
257TLE6240_PIN_3 = 233,
258TLE6240_PIN_4 = 234,
259TLE6240_PIN_5 = 235,
260TLE6240_PIN_6 = 236,
261TLE6240_PIN_7 = 237,
262TLE6240_PIN_8 = 238,
263TLE6240_PIN_9 = 239,
264TLE6240_PIN_10 = 240,
265TLE6240_PIN_11 = 241,
266TLE6240_PIN_12 = 242,
267TLE6240_PIN_13 = 243,
268TLE6240_PIN_14 = 244,
269TLE6240_PIN_15 = 245,
270TLE6240_PIN_16 = 246,
271
272L9779_IGN_1 = 247,
273L9779_IGN_2 = 248,
274L9779_IGN_3 = 249,
275L9779_IGN_4 = 250,
276L9779_OUT_1 = 251,
277L9779_OUT_2 = 252,
278L9779_OUT_3 = 253,
279L9779_OUT_4 = 254,
280L9779_OUT_5 = 255,
281L9779_OUT_6 = 256,
282L9779_OUT_7 = 257,
283L9779_OUT_8 = 258,
284L9779_OUT_9 = 259,
285L9779_OUT_10 = 260,
286L9779_OUT_11 = 261,
287L9779_OUT_12 = 262,
288L9779_OUT_13 = 263,
289L9779_OUT_14 = 264,
290L9779_OUT_15 = 265,
291L9779_OUT_16 = 266,
292L9779_OUT_17 = 267,
293L9779_OUT_18 = 268,
294L9779_OUT_19 = 269,
295L9779_OUT_20 = 270,
296L9779_OUT_A = 271,
297L9779_OUT_B = 272,
298L9779_OUT_C = 273,
299L9779_OUT_D = 274,
300L9779_OUT_25 = 275,
301L9779_OUT_26 = 276,
302L9779_OUT_27 = 277,
303L9779_OUT_28 = 278,
304L9779_OUT_MRD = 279,
305L9779_PIN_KEY = 280,
306
307CAN_PIN_0 = 281,
308CAN_PIN_1 = 282,
309CAN_PIN_2 = 283,
310CAN_PIN_3 = 284,
311CAN_PIN_4 = 285,
312CAN_PIN_5 = 286,
313CAN_PIN_6 = 287,
314CAN_PIN_7 = 288,
315
316PROTECTED_PIN_0 = 289,
317PROTECTED_PIN_1 = 290,
318PROTECTED_PIN_2 = 291,
319PROTECTED_PIN_3 = 292,
320PROTECTED_PIN_4 = 293,
321PROTECTED_PIN_5 = 294,
322PROTECTED_PIN_6 = 295,
323PROTECTED_PIN_7 = 296,
324PROTECTED_PIN_8 = 297,
325PROTECTED_PIN_9 = 298,
326PROTECTED_PIN_10 = 299,
327PROTECTED_PIN_11 = 300,
328PROTECTED_PIN_12 = 301,
329PROTECTED_PIN_13 = 302,
330PROTECTED_PIN_14 = 303,
331PROTECTED_PIN_15 = 304,
332
333MC33810_0_OUT_0 = 305,
334MC33810_0_OUT_1 = 306,
335MC33810_0_OUT_2 = 307,
336MC33810_0_OUT_3 = 308,
337MC33810_0_GD_0 = 309,
338MC33810_0_GD_1 = 310,
339MC33810_0_GD_2 = 311,
340MC33810_0_GD_3 = 312,
341
342MC33810_1_OUT_0 = 313,
343MC33810_1_OUT_1 = 314,
344MC33810_1_OUT_2 = 315,
345MC33810_1_OUT_3 = 316,
346MC33810_1_GD_0 = 317,
347MC33810_1_GD_1 = 318,
348MC33810_1_GD_2 = 319,
349MC33810_1_GD_3 = 320,
350
351TLE9104_0_OUT_0 = 321,
352TLE9104_0_OUT_1 = 322,
353TLE9104_0_OUT_2 = 323,
354TLE9104_0_OUT_3 = 324,
355TLE9104_1_OUT_0 = 325,
356TLE9104_1_OUT_1 = 326,
357TLE9104_1_OUT_2 = 327,
358TLE9104_1_OUT_3 = 328,
359TLE9104_2_OUT_0 = 329,
360TLE9104_2_OUT_1 = 330,
361TLE9104_2_OUT_2 = 331,
362TLE9104_2_OUT_3 = 332,
363TLE9104_3_OUT_0 = 333,
364TLE9104_3_OUT_1 = 334,
365TLE9104_3_OUT_2 = 335,
366TLE9104_3_OUT_3 = 336,
367TLE9104_4_OUT_0 = 337,
368TLE9104_4_OUT_1 = 338,
369TLE9104_4_OUT_2 = 339,
370TLE9104_4_OUT_3 = 340,
371TLE9104_5_OUT_0 = 341,
372TLE9104_5_OUT_1 = 342,
373TLE9104_5_OUT_2 = 343,
374TLE9104_5_OUT_3 = 344,
375
376MSIOBOX_0_OUT_1 = 345,
377MSIOBOX_0_OUT_2 = 346,
378MSIOBOX_0_OUT_3 = 347,
379MSIOBOX_0_OUT_4 = 348,
380MSIOBOX_0_OUT_5 = 349,
381MSIOBOX_0_OUT_6 = 350,
382MSIOBOX_0_OUT_7 = 351,
383MSIOBOX_0_OUT_8 = 352,
384MSIOBOX_0_VSS_1 = 353,
385MSIOBOX_0_VSS_2 = 354,
386MSIOBOX_0_VSS_3 = 355,
387MSIOBOX_0_VSS_4 = 356,
388MSIOBOX_0_SW_1 = 357,
389MSIOBOX_0_SW_2 = 358,
390MSIOBOX_0_SW_3 = 359,
391MSIOBOX_0_SW_4 = 360
392};
393
394/* Please keep updating these defines */
395#define BRAIN_PIN_ONCHIP_LAST Gpio::K15
396#define BRAIN_PIN_ONCHIP_PINS (BRAIN_PIN_ONCHIP_LAST - Gpio::A0 + 1)
397#define BRAIN_PIN_LAST Gpio::MSIOBOX_0_SW_4
398#define BRAIN_PIN_TOTAL_PINS (BRAIN_PIN_LAST - Gpio::A0 + 1)
@ TLE6240_PIN_10
@ L9779_OUT_6
@ MC33810_0_GD_3
@ TLE8888_PIN_MR
@ TLE8888_PIN_27
@ L9779_OUT_B
@ L9779_IGN_2
@ MSIOBOX_0_OUT_4
@ L9779_OUT_3
@ PROTECTED_PIN_15
@ MSIOBOX_0_VSS_2
@ CAN_PIN_1
@ MSIOBOX_0_VSS_3
@ MC33972_PIN_17
@ MC33810_0_OUT_2
@ PROTECTED_PIN_14
@ TLE8888_PIN_15
@ MC33810_1_OUT_1
@ MSIOBOX_0_OUT_2
@ L9779_OUT_14
@ MC33810_1_GD_3
@ TLE8888_PIN_26
@ PROTECTED_PIN_1
@ L9779_OUT_15
@ L9779_OUT_9
@ TLE9104_5_OUT_3
@ TLE8888_PIN_12
@ MC33972_PIN_10
@ TLE8888_PIN_WAKE
@ MC33810_1_GD_0
@ MC33972_PIN_20
@ Unassigned
@ MC33972_PIN_11
@ MC33810_1_OUT_0
@ PROTECTED_PIN_5
@ MC33972_PIN_2
@ L9779_IGN_1
@ PROTECTED_PIN_0
@ TLE9104_5_OUT_0
@ MC33810_1_OUT_2
@ TLE9104_4_OUT_0
@ MC33810_0_OUT_0
@ L9779_OUT_5
@ L9779_PIN_KEY
@ CAN_PIN_4
@ PROTECTED_PIN_3
@ CAN_PIN_0
@ L9779_IGN_3
@ MC33810_0_OUT_3
@ Invalid
@ TLE8888_PIN_22
@ TLE6240_PIN_1
@ MSIOBOX_0_SW_3
@ TLE9104_0_OUT_0
@ L9779_OUT_1
@ MC33972_PIN_19
@ MC33972_PIN_7
@ MC33972_PIN_22
@ TLE9104_0_OUT_2
@ TLE6240_PIN_6
@ L9779_IGN_4
@ CAN_PIN_3
@ TLE6240_PIN_8
@ TLE8888_PIN_23
@ TLE9104_0_OUT_3
@ CAN_PIN_6
@ TLE8888_PIN_25
@ MSIOBOX_0_OUT_7
@ MSIOBOX_0_OUT_3
@ PROTECTED_PIN_10
@ PROTECTED_PIN_4
@ MC33972_PIN_18
@ TLE9104_4_OUT_3
@ TLE8888_PIN_9
@ MC33810_1_GD_1
@ L9779_OUT_7
@ MC33972_PIN_14
@ MC33972_PIN_21
@ TLE8888_PIN_1
@ PROTECTED_PIN_12
@ MC33972_PIN_6
@ MSIOBOX_0_OUT_6
@ TLE8888_PIN_18
@ TLE6240_PIN_13
@ TLE6240_PIN_7
@ TLE8888_PIN_11
@ L9779_OUT_26
@ L9779_OUT_11
@ L9779_OUT_16
@ TLE6240_PIN_5
@ TLE9104_2_OUT_0
@ TLE8888_PIN_19
@ TLE9104_1_OUT_0
@ TLE8888_PIN_2
@ MSIOBOX_0_OUT_1
@ TLE8888_PIN_KEY
@ TLE8888_PIN_5
@ TLE9104_1_OUT_2
@ L9779_OUT_17
@ MC33972_PIN_9
@ PROTECTED_PIN_8
@ L9779_OUT_20
@ MC33972_PIN_1
@ MC33810_1_OUT_3
@ CAN_PIN_7
@ TLE9104_5_OUT_1
@ L9779_OUT_8
@ L9779_OUT_27
@ TLE8888_PIN_6
@ MC33972_PIN_13
@ L9779_OUT_12
@ TLE8888_PIN_24
@ TLE9104_1_OUT_1
@ TLE8888_PIN_8
@ TLE9104_0_OUT_1
@ MC33810_0_GD_2
@ PROTECTED_PIN_11
@ TLE8888_PIN_7
@ L9779_OUT_13
@ MC33810_0_OUT_1
@ MC33810_1_GD_2
@ TLE9104_3_OUT_3
@ L9779_OUT_25
@ TLE9104_4_OUT_2
@ MC33972_PIN_12
@ MSIOBOX_0_SW_4
@ L9779_OUT_28
@ TLE8888_PIN_4
@ L9779_OUT_C
@ MC33972_PIN_3
@ PROTECTED_PIN_7
@ TLE6240_PIN_14
@ TLE9104_2_OUT_3
@ TLE6240_PIN_11
@ TLE9104_4_OUT_1
@ TLE8888_PIN_20
@ MC33972_PIN_4
@ TLE6240_PIN_15
@ TLE8888_PIN_17
@ MC33972_PIN_8
@ MC33972_PIN_5
@ TLE8888_PIN_14
@ MC33810_0_GD_1
@ PROTECTED_PIN_9
@ PROTECTED_PIN_2
@ PROTECTED_PIN_6
@ TLE9104_3_OUT_2
@ CAN_PIN_2
@ L9779_OUT_10
@ TLE6240_PIN_9
@ MC33810_0_GD_0
@ TLE8888_PIN_21
@ L9779_OUT_2
@ CAN_PIN_5
@ TLE6240_PIN_4
@ TLE6240_PIN_3
@ MSIOBOX_0_SW_1
@ MSIOBOX_0_OUT_8
@ TLE6240_PIN_16
@ TLE6240_PIN_2
@ MSIOBOX_0_VSS_4
@ L9779_OUT_19
@ TLE8888_PIN_3
@ MC33972_PIN_16
@ MSIOBOX_0_VSS_1
@ TLE9104_3_OUT_0
@ TLE9104_5_OUT_2
@ L9779_OUT_D
@ L9779_OUT_A
@ TLE9104_2_OUT_1
@ MSIOBOX_0_SW_2
@ MC33972_PIN_15
@ TLE8888_PIN_13
@ TLE8888_PIN_10
@ L9779_OUT_4
@ TLE9104_1_OUT_3
@ TLE6240_PIN_12
@ MSIOBOX_0_OUT_5
@ TLE8888_PIN_28
@ PROTECTED_PIN_13
@ TLE9104_2_OUT_2
@ TLE9104_3_OUT_1
@ TLE8888_PIN_16
@ L9779_OUT_18
@ L9779_OUT_MRD