hip9011 - 3v to 5v level issues

[Spilly]

There are a few different ways to do.

Here's a level shifter with a mosfet:

Level-shifter.jpg

This is two n-ch mosfets in a single package.
http://www.digikey.com/product-detail/en/2N7002PS,115/568-5984-1-ND/2531271

Diodes are another possibility.

[kb1gtt]

The TPIC has an internal pull up, so it should pull up to 5V or what ever the TPIC has for VDD. However it appears the STM must be driving both high and low. AKA when the STM drives it forces the SPI line to 3.3V, even though there TPIC is trying to weakly pull it up to 5V. Can we verify that the STM is driving high and low on the SPI lines? Also can we change that to float and drive low?

[Spilly]

The TPIC has an internal pull up, so it should pull up to 5V or what ever the TPIC has for VDD. However it appears the STM must be driving both high and low. AKA when the STM drives it forces the SPI line to 3.3V, even though there TPIC is trying to weakly pull it up to 5V. Can we verify that the STM is driving high and low on the SPI lines? Also can we change that to float and drive low?

When the STM32 to TPIC SPI line goes HIGH, the line only reaches 3V. When the STM32 is disconnected from the TPIC, the TPIC side of the SPI line goes to 5V. I'm assuming this is due to some sort of internal I/O protection circuit on the STM32.

When you say "float", do you mean high impedance? I don't think that is a standard mode of operation for the STM32's SPI bus. However, I'm sure it's possible to do so. The worst case scenario would be having to bit-bang the data instead of using the ChibiOS driver calls. In theory changing the STM32's SPI bus output register to be high-z instead of a logic high should work. I will take a look at it.

[Spilly]

I have successfully found a software fix that requires no modification to the PCB and no additional parts. This was possible by changing the registers of the STM32 outputs connected to the TPIC to "Open drain mode: A “0” in the Output register activates the N-MOS whereas a “1” in the Output register leaves the port in Hi-Z (the P-MOS is never activated)." pg 277 http://www.st.com/web/en/resource/technical/document/reference_manual/DM00031020.pdf

Here is the patch:

There are a few modifications I do recommend to reduce unnecessary power consumption. Remove resistors R171, R172, R173, and R174 (the TPIC's internal pullups are sufficient). Also change R170's value from 1k to 4.7k.

[Spilly]

The TPIC has an internal pull up, so it should pull up to 5V or what ever the TPIC has for VDD. However it appears the STM must be driving both high and low. AKA when the STM drives it forces the SPI line to 3.3V, even though there TPIC is trying to weakly pull it up to 5V. Can we verify that the STM is driving high and low on the SPI lines? Also can we change that to float and drive low?

Great idea! Looks like no board mods will be needed!

[kb1gtt]

Awesome and thanks for the good news.

Do you have an analog scope? Can we get a sniffing of the data bits? I wonder if the pull up resistor is good and solid or if it might be rounding a bit. AKA the pull up resistor is driving a small capacitor (the wires) and the resistor limiting the flow will cause a certain amount of rounding on the raising edge. I'm curious how much capacitance we have relative to that resistor. I expect it to be reasonably low, but those SPI lines are also reasonably long, and zig zag across the STM board. So the capacitance is a bit of an unknown.

I like your style of make progress, then post the fix. Very cool, and thanks for the help moving this forward.

[AndreyB]

Here is the patch:

There are a few modifications I do recommend to reduce unnecessary power consumption. Remove resistors R171, R172, R173, and R174 (the TPIC's internal pullups are sufficient). Also change R170's value from 1k to 4.7k.

We are in a little bit of a version hell - your patch is against not the latest code version. But I've got the idea, I will now make the needed changes Thank you for investigating it!

Not sure if I will test this today, too much race car wrenching in the sun today.

[AndreyB]

With the new code

Code: Select all

	engineConfiguration->spi2SckMode = PAL_STM32_OTYPE_OPENDRAIN;
	engineConfiguration->spi2MosiMode = PAL_STM32_OTYPE_OPENDRAIN;
	engineConfiguration->spi2MisoMode = PAL_STM32_PUDR_PULLUP;
	boardConfiguration->hip9011IntHoldPinMode = OM_OPENDRAIN;

	outputPinRegisterExt2("hip CS", &hipCs, boardConfiguration->hip9011CsPin, &OPENDRAIN_OUTPUT);

I've failed to save the clock picture, but it also looked pretty analog and the voltage was pretty low.

MOSI:

pb15_mosi_no_diode.BMP

MISO:

pb14_miso_no_diode.BMP

[Spilly]

With the new code

Code: Select all

	engineConfiguration->spi2SckMode = PAL_STM32_OTYPE_OPENDRAIN;
	engineConfiguration->spi2MosiMode = PAL_STM32_OTYPE_OPENDRAIN;
	engineConfiguration->spi2MisoMode = PAL_STM32_PUDR_PULLUP;
	boardConfiguration->hip9011IntHoldPinMode = OM_OPENDRAIN;

	outputPinRegisterExt2("hip CS", &hipCs, boardConfiguration->hip9011CsPin, &OPENDRAIN_OUTPUT);

I've failed to save the clock picture, but it also looked pretty analog and the voltage was pretty low.

MOSI:

pb15_mosi_no_diode.BMP

MISO:

pb14_miso_no_diode.BMP

It looks there is a bit more capacitance on your SPI bus than I have on mine. That means a stronger pullup is needed. To find the ideal pullup value the capacitance of each line would need to be known. If you change your time per division to 2 uS that should give me an accurate enough rise time measurement. For a quick fix, reinstalling the 1k pullups should resolve the issue.

[AndreyB]

Lets try leaving the capacitor values at 24pF and decreasing the value of R177 to around 300 ohms.

Edit: Just realized you are talking about the capacitor that is connected to the CS line. That component shouldn't be necessary. The current component values just need to be tweaked/tuned. Don't you love analog circuits?

I will check what resistor values I have and report back Will also grab another board and try with 1K pull-ups again on the failing lines.

[kb1gtt]

Agreed, faster scope capture will help in determining the capacitance, which can then help in determining the pull up resistor.

I designed R177 per Figure 15. Negative Resistance Measuring Circuit on this PDF page 11. Take note it specifies you increase the Rq until you hit the max. The XTAL's ESR is 80 ohms, or should be 80 ohms assuming china populated the correct part(s). Being 8 megs, and seeing that 7.99 megs it 100 ohms, means we might really be 90 ohms. Any how, with a SF of 3, Rq should be 3*80 = 240 ohms, and it appears that 280 ohms is to much. So we should decrease the value of R177 and see when it starts. Then we can cald the SF and see if we are acceptable or not.

http://e2e.ti.com/cfs-file/__key/telligent-evolution-components-attachments/00-73-01-00-00-30-76-28/SBAA123_5F00_Using_5F00_Crystal_5F00_Oscillators_5F00_with_5F00_MSC12xx.pdf

[AndreyB]

Since I have a bunch of these assembled rev 0.4 boards I've decided to play with another one and that other one the osc does start without any modifications - without C169 and with stock R177. Weird. I am pretty sure the other 0.4 was waiting for a touch.

Also want to report that with the 1K pull-ups SPI works fine with 12v power supply and 5.00 vcc at hip/tpic, success!

Here is a larger scale MOSI like from the board without pull-ups:

pb15_mosi_different_scale.BMP

[AndreyB]

And here is 2us

[kb1gtt]

I forgot to look at this, but that's partly because of time issues lately.

Did the 1k pull up fix this rounded corner issue?

[AndreyB]

Did the 1k pull up fix this rounded corner issue?

Yes, everything is fine with a 1K but I believe there were ideas about increasing that value to reduce power consumption?

[kb1gtt]

Was the most recent picture with the 1k? I believe that was with the internal pull up only. Can you get a capture with the 1k?

[Spilly]

I finally found some spare time to come back to this. If we consider the MOSI circuit to be purely an RC circuit, your MOSI line had just under 70 picoFarads of capacitance. That sounds very high.

Was your probe in 10x mode?

Was your logic analyzer or any other device connected to the MOSI line?

[RasPL]

Maybe better way to do this is just to use IC i.e 74lvc4245 or similar
http://www.nxp.com/documents/data_sheet/74LVC4245A.pdf
I've used it up to 20MHz without any issue.

[AndreyB]

Maybe better way to do this is just to use IC i.e 74lvc4245

this is maybe a straight-forward way, but too much real estate for such a trivial issue? And we do not really need the speed so much...