fsl_clock.h File Reference

Data Structures
struct	_scg_sys_clk_config
	SCG system clock configuration. More...
struct	_scg_sosc_config
	SCG system OSC configuration. More...
struct	_scg_sirc_config
	SCG slow IRC clock configuration. More...
struct	_scg_firc_trim_config
	SCG fast IRC clock trim configuration. More...
struct	_scg_firc_config_t
	SCG fast IRC clock configuration. More...
struct	_scg_spll_config
	SCG system PLL configuration. More...

Functions
MCU System Clock.
uint32_t	CLOCK_GetSysClkFreq (scg_sys_clk_t type)
	Gets the SCG system clock frequency.
static void	CLOCK_SetVlprModeSysClkConfig (const scg_sys_clk_config_t *config)
	Sets the system clock configuration for VLPR mode.
static void	CLOCK_SetRunModeSysClkConfig (const scg_sys_clk_config_t *config)
	Sets the system clock configuration for RUN mode.
static void	CLOCK_SetHsrunModeSysClkConfig (const scg_sys_clk_config_t *config)
	Sets the system clock configuration for HSRUN mode.
static void	CLOCK_GetCurSysClkConfig (scg_sys_clk_config_t *config)
	Gets the system clock configuration in the current power mode.
static void	CLOCK_SetClkOutSel (clock_clkout_src_t setting)
	Sets the clock out selection.
SCG System OSC Clock.
status_t	CLOCK_InitSysOsc (const scg_sosc_config_t *config)
	Initializes the SCG system OSC.
status_t	CLOCK_DeinitSysOsc (void)
	De-initializes the SCG system OSC.
static void	CLOCK_SetSysOscAsyncClkDiv (scg_async_clk_t asyncClk, scg_async_clk_div_t divider)
	Set the asynchronous clock divider.
uint32_t	CLOCK_GetSysOscFreq (void)
	Gets the SCG system OSC clock frequency (SYSOSC).
uint32_t	CLOCK_GetSysOscAsyncFreq (scg_async_clk_t type)
	Gets the SCG asynchronous clock frequency from the system OSC.
static bool	CLOCK_IsSysOscErr (void)
	Checks whether the system OSC clock error occurs.
static void	CLOCK_ClearSysOscErr (void)
	Clears the system OSC clock error.
static void	CLOCK_SetSysOscMonitorMode (scg_sosc_monitor_mode_t mode)
	Sets the system OSC monitor mode.
static bool	CLOCK_IsSysOscValid (void)
	Checks whether the system OSC clock is valid.
SCG Slow IRC Clock.
status_t	CLOCK_InitSirc (const scg_sirc_config_t *config)
	Initializes the SCG slow IRC clock.
status_t	CLOCK_DeinitSirc (void)
	De-initializes the SCG slow IRC.
static void	CLOCK_SetSircAsyncClkDiv (scg_async_clk_t asyncClk, scg_async_clk_div_t divider)
	Set the asynchronous clock divider.
uint32_t	CLOCK_GetSircFreq (void)
	Gets the SCG SIRC clock frequency.
uint32_t	CLOCK_GetSircAsyncFreq (scg_async_clk_t type)
	Gets the SCG asynchronous clock frequency from the SIRC.
static bool	CLOCK_IsSircValid (void)
	Checks whether the SIRC clock is valid.
SCG Fast IRC Clock.
status_t	CLOCK_InitFirc (const scg_firc_config_t *config)
	Initializes the SCG fast IRC clock.
status_t	CLOCK_DeinitFirc (void)
	De-initializes the SCG fast IRC.
static void	CLOCK_SetFircAsyncClkDiv (scg_async_clk_t asyncClk, scg_async_clk_div_t divider)
	Set the asynchronous clock divider.
uint32_t	CLOCK_GetFircFreq (void)
	Gets the SCG FIRC clock frequency.
uint32_t	CLOCK_GetFircAsyncFreq (scg_async_clk_t type)
	Gets the SCG asynchronous clock frequency from the FIRC.
static bool	CLOCK_IsFircErr (void)
	Checks whether the FIRC clock error occurs.
static void	CLOCK_ClearFircErr (void)
	Clears the FIRC clock error.
static bool	CLOCK_IsFircValid (void)
	Checks whether the FIRC clock is valid.
SCG System PLL Clock.
uint32_t	CLOCK_GetSysPllMultDiv (uint32_t refFreq, uint32_t desireFreq, uint8_t *mult, uint8_t *prediv)
	Calculates the MULT and PREDIV for the PLL.
status_t	CLOCK_InitSysPll (const scg_spll_config_t *config)
	Initializes the SCG system PLL.
status_t	CLOCK_DeinitSysPll (void)
	De-initializes the SCG system PLL.
static void	CLOCK_SetSysPllAsyncClkDiv (scg_async_clk_t asyncClk, scg_async_clk_div_t divider)
	Set the asynchronous clock divider.
uint32_t	CLOCK_GetSysPllFreq (void)
	Gets the SCG system PLL clock frequency.
uint32_t	CLOCK_GetSysPllAsyncFreq (scg_async_clk_t type)
	Gets the SCG asynchronous clock frequency from the system PLL.
static bool	CLOCK_IsSysPllErr (void)
	Checks whether the system PLL clock error occurs.
static void	CLOCK_ClearSysPllErr (void)
	Clears the system PLL clock error.
static void	CLOCK_SetSysPllMonitorMode (scg_spll_monitor_mode_t mode)
	Sets the system PLL monitor mode.
static bool	CLOCK_IsSysPllValid (void)
	Checks whether the system PLL clock is valid.
OSC32 operations
void	OSC32_Init (OSC32_Type *base, osc32_mode_t mode)
	Initializes OSC32.
void	OSC32_Deinit (OSC32_Type *base)
	Deinitializes OSC32.
External clock frequency
static void	CLOCK_SetXtal0Freq (uint32_t freq)
	Sets the XTAL0 frequency based on board settings.
static void	CLOCK_SetXtal32Freq (uint32_t freq)
	Sets the XTAL32 frequency based on board settings.

Driver version
enum	_clock_name {   kCLOCK_CoreSysClk , kCLOCK_BusClk , kCLOCK_FlexBusClk , kCLOCK_FlashClk ,   kCLOCK_ScgSysOscClk , kCLOCK_ScgSircClk , kCLOCK_ScgFircClk , kCLOCK_ScgSysPllClk ,   kCLOCK_ScgSysOscAsyncDiv1Clk , kCLOCK_ScgSysOscAsyncDiv2Clk , kCLOCK_ScgSircAsyncDiv1Clk , kCLOCK_ScgSircAsyncDiv2Clk ,   kCLOCK_ScgFircAsyncDiv1Clk , kCLOCK_ScgFircAsyncDiv2Clk , kCLOCK_ScgSysPllAsyncDiv1Clk , kCLOCK_ScgSysPllAsyncDiv2Clk ,   kCLOCK_LpoClk , kCLOCK_Osc32kClk , kCLOCK_ErClk }
	Clock name used to get clock frequency. More...
enum	_clock_ip_src {   kCLOCK_IpSrcNoneOrExt = 0U , kCLOCK_IpSrcSysOscAsync = 1U , kCLOCK_IpSrcSircAsync = 2U , kCLOCK_IpSrcFircAsync = 3U ,   kCLOCK_IpSrcSysPllAsync = 6U }
	Clock source for peripherals that support various clock selections. More...
enum	_clock_ip_name {   kCLOCK_IpInvalid = 0U , kCLOCK_Dma0 = 0x40065020U , kCLOCK_Sysmpu0 = 0x40065034U , kCLOCK_Flash0 = 0x40065080U ,   kCLOCK_Dmamux0 = 0x40065084U , kCLOCK_Flexcan0 = 0x40065090U , kCLOCK_Flexcan1 = 0x40065094U , kCLOCK_Ftm3 = 0x40065098U ,   kCLOCK_Adc1 = 0x4006509CU , kCLOCK_Lpspi0 = 0x400650B0U , kCLOCK_Lpspi1 = 0x400650B4U , kCLOCK_Pdb1 = 0x400650C4U ,   kCLOCK_Crc0 = 0x400650C8U , kCLOCK_Pdb2 = 0x400650CCU , kCLOCK_Pdb0 = 0x400650D8U , kCLOCK_Lpit0 = 0x400650DCU ,   kCLOCK_Ftm0 = 0x400650E0U , kCLOCK_Ftm1 = 0x400650E4U , kCLOCK_Ftm2 = 0x400650E8U , kCLOCK_Adc0 = 0x400650ECU ,   kCLOCK_Adc2 = 0x400650F0U , kCLOCK_Rtc0 = 0x400650F4U , kCLOCK_Dac0 = 0x400650FCU , kCLOCK_Lptmr0 = 0x40065100U ,   kCLOCK_PortA = 0x40065124U , kCLOCK_PortB = 0x40065128U , kCLOCK_PortC = 0x4006512CU , kCLOCK_PortD = 0x40065130U ,   kCLOCK_PortE = 0x40065134U , kCLOCK_Pwt0 = 0x40065158U , kCLOCK_Flexio0 = 0x40065168U , kCLOCK_RtcOsc0 = 0x40065180U ,   kCLOCK_Ewm0 = 0x40065184U , kCLOCK_Lpi2c0 = 0x40065198U , kCLOCK_Lpi2c1 = 0x4006519CU , kCLOCK_Lpuart0 = 0x400651A8U ,   kCLOCK_Lpuart1 = 0x400651ACU , kCLOCK_Lpuart2 = 0x400651B0U , kCLOCK_Cmp0 = 0x400651CCU , kCLOCK_Cmp1 = 0x400651D0U ,   kCLOCK_Cmp2 = 0x400651D4U }
	Peripheral clock name difinition used for clock gate, clock source and clock divider setting. It is defined as the corresponding register address. More...
enum	_osc32_mode { kOSC32_Bypass = OSC32_CR_ROSCEN_MASK , kOSC32_Crystal = OSC32_CR_ROSCEN_MASK | OSC32_CR_ROSCEREFS_MASK , kOSC32_CrystalEnableInStop }
	OSC32 work mode. More...
enum	_scg_status { kStatus_SCG_Busy = MAKE_STATUS(kStatusGroup_SCG, 1) , kStatus_SCG_InvalidSrc = MAKE_STATUS(kStatusGroup_SCG, 2) }
	SCG status return codes. More...
enum	_scg_sys_clk { kSCG_SysClkSlow , kSCG_SysClkBus , kSCG_SysClkCore }
	SCG system clock type. More...
enum	_scg_sys_clk_src { kSCG_SysClkSrcSysOsc = 1U , kSCG_SysClkSrcSirc = 2U , kSCG_SysClkSrcFirc = 3U , kSCG_SysClkSrcSysPll = 6U }
	SCG system clock source. More...
enum	_scg_sys_clk_div {   kSCG_SysClkDivBy1 = 0U , kSCG_SysClkDivBy2 = 1U , kSCG_SysClkDivBy3 = 2U , kSCG_SysClkDivBy4 = 3U ,   kSCG_SysClkDivBy5 = 4U , kSCG_SysClkDivBy6 = 5U , kSCG_SysClkDivBy7 = 6U , kSCG_SysClkDivBy8 = 7U ,   kSCG_SysClkDivBy9 = 8U , kSCG_SysClkDivBy10 = 9U , kSCG_SysClkDivBy11 = 10U , kSCG_SysClkDivBy12 = 11U ,   kSCG_SysClkDivBy13 = 12U , kSCG_SysClkDivBy14 = 13U , kSCG_SysClkDivBy15 = 14U , kSCG_SysClkDivBy16 = 15U }
	SCG system clock divider value. More...
enum	_clock_clkout_src {   kClockClkoutSelScgSlow = 0U , kClockClkoutSelSysOsc = 1U , kClockClkoutSelSirc = 2U , kClockClkoutSelFirc = 3U ,   kClockClkoutSelSysPll = 6U }
	SCG clock out configuration (CLKOUTSEL). More...
enum	_scg_async_clk { kSCG_AsyncDiv1Clk , kSCG_AsyncDiv2Clk }
	SCG asynchronous clock type. More...
enum	scg_async_clk_div {   kSCG_AsyncClkDisable = 0U , kSCG_AsyncClkDivBy1 = 1U , kSCG_AsyncClkDivBy2 = 2U , kSCG_AsyncClkDivBy4 = 3U ,   kSCG_AsyncClkDivBy8 = 4U , kSCG_AsyncClkDivBy16 = 5U , kSCG_AsyncClkDivBy32 = 6U , kSCG_AsyncClkDivBy64 = 7U }
	SCG asynchronous clock divider value. More...
enum	_scg_sosc_monitor_mode { kSCG_SysOscMonitorDisable = 0U , kSCG_SysOscMonitorInt = SCG_SOSCCSR_SOSCCM_MASK , kSCG_SysOscMonitorReset }
	SCG system OSC monitor mode. More...
enum	_scg_sosc_mode { kSCG_SysOscModeExt = 0U , kSCG_SysOscModeOscLowPower = SCG_SOSCCFG_EREFS_MASK , kSCG_SysOscModeOscHighGain = SCG_SOSCCFG_EREFS_MASK | SCG_SOSCCFG_HGO_MASK }
	OSC work mode. More...
enum	_scg_sosc_enable_mode { kSCG_SysOscEnable = SCG_SOSCCSR_SOSCEN_MASK , kSCG_SysOscEnableInStop = SCG_SOSCCSR_SOSCSTEN_MASK , kSCG_SysOscEnableInLowPower = SCG_SOSCCSR_SOSCLPEN_MASK , kSCG_SysOscEnableErClk = SCG_SOSCCSR_SOSCERCLKEN_MASK }
	OSC enable mode. More...
enum	_scg_sirc_range { kSCG_SircRangeLow , kSCG_SircRangeHigh }
	SCG slow IRC clock frequency range. More...
enum	_scg_sirc_enable_mode { kSCG_SircEnable = SCG_SIRCCSR_SIRCEN_MASK , kSCG_SircEnableInStop = SCG_SIRCCSR_SIRCSTEN_MASK , kSCG_SircEnableInLowPower = SCG_SIRCCSR_SIRCLPEN_MASK }
	SIRC enable mode. More...
enum	_scg_firc_trim_mode { kSCG_FircTrimNonUpdate = SCG_FIRCCSR_FIRCTREN_MASK , kSCG_FircTrimUpdate = SCG_FIRCCSR_FIRCTREN_MASK | SCG_FIRCCSR_FIRCTRUP_MASK }
	SCG fast IRC trim mode. More...
enum	_scg_firc_trim_div {   kSCG_FircTrimDivBy1 , kSCG_FircTrimDivBy128 , kSCG_FircTrimDivBy256 , kSCG_FircTrimDivBy512 ,   kSCG_FircTrimDivBy1024 , kSCG_FircTrimDivBy2048 }
	SCG fast IRC trim predivided value for system OSC. More...
enum	_scg_firc_trim_src { kSCG_FircTrimSrcSysOsc = 2U }
	SCG fast IRC trim source. More...
enum	_scg_firc_range { kSCG_FircRange48M , kSCG_FircRange52M , kSCG_FircRange56M , kSCG_FircRange60M }
	SCG fast IRC clock frequency range. More...
enum	_scg_firc_enable_mode { kSCG_FircEnable = SCG_FIRCCSR_FIRCEN_MASK , kSCG_FircEnableInStop = SCG_FIRCCSR_FIRCSTEN_MASK , kSCG_FircEnableInLowPower = SCG_FIRCCSR_FIRCLPEN_MASK , kSCG_FircDisableRegulator = SCG_FIRCCSR_FIRCREGOFF_MASK }
	FIRC enable mode. More...
enum	_scg_spll_src { kSCG_SysPllSrcSysOsc , kSCG_SysPllSrcFirc }
	SCG system PLL clock source. More...
enum	_scg_spll_monitor_mode { kSCG_SysPllMonitorDisable = 0U , kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK , kSCG_SysPllMonitorReset }
	SCG system PLL monitor mode. More...
enum	_scg_spll_enable_mode { kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK , kSCG_SysPllEnableInStop = SCG_SPLLCSR_SPLLSTEN_MASK }
	SPLL enable mode. More...
typedef enum _clock_name	clock_name_t
	Clock name used to get clock frequency.
typedef enum _clock_ip_src	clock_ip_src_t
	Clock source for peripherals that support various clock selections.
typedef enum _clock_ip_name	clock_ip_name_t
	Peripheral clock name difinition used for clock gate, clock source and clock divider setting. It is defined as the corresponding register address.
typedef enum _osc32_mode	osc32_mode_t
	OSC32 work mode.
typedef enum _scg_sys_clk	scg_sys_clk_t
	SCG system clock type.
typedef enum _scg_sys_clk_src	scg_sys_clk_src_t
	SCG system clock source.
typedef enum _scg_sys_clk_div	scg_sys_clk_div_t
	SCG system clock divider value.
typedef struct _scg_sys_clk_config	scg_sys_clk_config_t
	SCG system clock configuration.
typedef enum _clock_clkout_src	clock_clkout_src_t
	SCG clock out configuration (CLKOUTSEL).
typedef enum _scg_async_clk	scg_async_clk_t
	SCG asynchronous clock type.
typedef enum scg_async_clk_div	scg_async_clk_div_t
	SCG asynchronous clock divider value.
typedef enum _scg_sosc_monitor_mode	scg_sosc_monitor_mode_t
	SCG system OSC monitor mode.
typedef enum _scg_sosc_mode	scg_sosc_mode_t
	OSC work mode.
typedef struct _scg_sosc_config	scg_sosc_config_t
	SCG system OSC configuration.
typedef enum _scg_sirc_range	scg_sirc_range_t
	SCG slow IRC clock frequency range.
typedef struct _scg_sirc_config	scg_sirc_config_t
	SCG slow IRC clock configuration.
typedef enum _scg_firc_trim_mode	scg_firc_trim_mode_t
	SCG fast IRC trim mode.
typedef enum _scg_firc_trim_div	scg_firc_trim_div_t
	SCG fast IRC trim predivided value for system OSC.
typedef enum _scg_firc_trim_src	scg_firc_trim_src_t
	SCG fast IRC trim source.
typedef struct _scg_firc_trim_config	scg_firc_trim_config_t
	SCG fast IRC clock trim configuration.
typedef enum _scg_firc_range	scg_firc_range_t
	SCG fast IRC clock frequency range.
typedef struct _scg_firc_config_t	scg_firc_config_t
	SCG fast IRC clock configuration.
typedef enum _scg_spll_src	scg_spll_src_t
	SCG system PLL clock source.
typedef enum _scg_spll_monitor_mode	scg_spll_monitor_mode_t
	SCG system PLL monitor mode.
typedef struct _scg_spll_config	scg_spll_config_t
	SCG system PLL configuration.
volatile uint32_t	g_xtal0Freq
	External XTAL0 (OSC0/SYSOSC) clock frequency.
volatile uint32_t	g_xtal32Freq
	External XTAL32/EXTAL32 clock frequency.
static void	CLOCK_EnableClock (clock_ip_name_t name)
	Enable the clock for specific IP.
static void	CLOCK_DisableClock (clock_ip_name_t name)
	Disable the clock for specific IP.
static bool	CLOCK_IsEnabledByOtherCore (clock_ip_name_t name)
	Check whether the clock is already enabled and configured by any other core.
static void	CLOCK_SetIpSrc (clock_ip_name_t name, clock_ip_src_t src)
	Set the clock source for specific IP module.
uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Gets the clock frequency for a specific clock name.
uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Get the core clock or system clock frequency.
uint32_t	CLOCK_GetBusClkFreq (void)
	Get the bus clock frequency.
uint32_t	CLOCK_GetFlashClkFreq (void)
	Get the flash clock frequency.
uint32_t	CLOCK_GetOsc32kClkFreq (void)
	Get the OSC 32K clock frequency (OSC32KCLK).
uint32_t	CLOCK_GetErClkFreq (void)
	Get the external reference clock frequency (ERCLK).
uint32_t	CLOCK_GetIpFreq (clock_ip_name_t name)
	Gets the clock frequency for a specific IP module.

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