14#define BOARD_NAME "Soate S105"
20#define STM32_LSECLK 32768
21#define STM32_HSECLK 25000000
33#define GPIOC_OSC32_IN 14
34#define GPIOC_OSC32_OUT 15
37#define GPIOH_OSC_OUT 1
44#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
45#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
46#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
47#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
48#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
49#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
50#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
51#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
52#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
53#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
54#define PIN_PUDR_FLOATING(n) (0U << ((n) * 2))
55#define PIN_PUDR_PULLUP(n) (1U << ((n) * 2))
56#define PIN_PUDR_PULLDOWN(n) (2U << ((n) * 2))
57#define PIN_AFIO_AF(n, v) ((v##U) << (((n) % 8) * 4))
68#define VAL_GPIOA_MODER (0x2aa8ffff)
69#define VAL_GPIOA_OTYPER (0x00000000)
70#define VAL_GPIOA_OSPEEDR (0x0ffc0000)
71#define VAL_GPIOA_PUPDR (0x24000000)
72#define VAL_GPIOA_ODR (0x00000000)
73#define VAL_GPIOA_AFRL (0x00000000)
74#define VAL_GPIOA_AFRH (0x00099770)
88#define VAL_GPIOB_MODER (0x102a018f)
89#define VAL_GPIOB_OTYPER (0x00004300)
90#define VAL_GPIOB_OSPEEDR (0x200a00c0)
91#define VAL_GPIOB_PUPDR (0x00000010)
92#define VAL_GPIOB_ODR (0x00000010)
93#define VAL_GPIOB_AFRL (0x00000000)
94#define VAL_GPIOB_AFRH (0x00000133)
105#define VAL_GPIOC_MODER (0x0000afff)
106#define VAL_GPIOC_OTYPER (0x000000c0)
107#define VAL_GPIOC_OSPEEDR (0x0000a000)
108#define VAL_GPIOC_PUPDR (0x00004000)
109#define VAL_GPIOC_ODR (0x00000000)
110#define VAL_GPIOC_AFRL (0x22000000)
111#define VAL_GPIOC_AFRH (0x00000000)
122#define VAL_GPIOD_MODER (0x55551111)
123#define VAL_GPIOD_OTYPER (0x00003f55)
124#define VAL_GPIOD_OSPEEDR (0x00aa2022)
125#define VAL_GPIOD_PUPDR (0x00000000)
126#define VAL_GPIOD_ODR (0x00000010)
127#define VAL_GPIOD_AFRL (0x00000000)
128#define VAL_GPIOD_AFRH (0x00000000)
139#define VAL_GPIOE_MODER (0x11111501)
140#define VAL_GPIOE_OTYPER (0x00005471)
141#define VAL_GPIOE_OSPEEDR (0x22202802)
142#define VAL_GPIOE_PUPDR (0x00000000)
143#define VAL_GPIOE_ODR (0x00001010)
144#define VAL_GPIOE_AFRL (0x00000000)
145#define VAL_GPIOE_AFRH (0x00000000)
153#define VAL_GPIOF_MODER 0x00000000
154#define VAL_GPIOF_OTYPER 0x00000000
155#define VAL_GPIOF_OSPEEDR 0xFFFFFFFF
156#define VAL_GPIOF_PUPDR (PIN_PUDR_PULLUP(0) | \
157 PIN_PUDR_PULLUP(1) | \
158 PIN_PUDR_PULLUP(2) | \
159 PIN_PUDR_PULLUP(3) | \
160 PIN_PUDR_PULLUP(4) | \
161 PIN_PUDR_PULLUP(5) | \
162 PIN_PUDR_PULLUP(6) | \
163 PIN_PUDR_PULLUP(7) | \
164 PIN_PUDR_PULLUP(8) | \
165 PIN_PUDR_PULLUP(9) | \
166 PIN_PUDR_PULLUP(10) | \
167 PIN_PUDR_PULLUP(11) | \
168 PIN_PUDR_PULLUP(12) | \
169 PIN_PUDR_PULLUP(13) | \
170 PIN_PUDR_PULLUP(14) | \
172#define VAL_GPIOF_ODR 0xFFFFFFFF
173#define VAL_GPIOF_AFRL 0x00000000
174#define VAL_GPIOF_AFRH 0x00000000
182#define VAL_GPIOG_MODER 0x00000000
183#define VAL_GPIOG_OTYPER 0x00000000
184#define VAL_GPIOG_OSPEEDR 0xFFFFFFFF
185#define VAL_GPIOG_PUPDR (PIN_PUDR_PULLUP(0) | \
186 PIN_PUDR_PULLUP(1) | \
187 PIN_PUDR_PULLUP(2) | \
188 PIN_PUDR_PULLUP(3) | \
189 PIN_PUDR_PULLUP(4) | \
190 PIN_PUDR_PULLUP(5) | \
191 PIN_PUDR_PULLUP(6) | \
192 PIN_PUDR_PULLUP(7) | \
193 PIN_PUDR_PULLUP(8) | \
194 PIN_PUDR_PULLUP(9) | \
195 PIN_PUDR_PULLUP(10) | \
196 PIN_PUDR_PULLUP(11) | \
197 PIN_PUDR_PULLUP(12) | \
198 PIN_PUDR_PULLUP(13) | \
199 PIN_PUDR_PULLUP(14) | \
201#define VAL_GPIOG_ODR 0xFFFFFFFF
202#define VAL_GPIOG_AFRL 0x00000000
203#define VAL_GPIOG_AFRH 0x00000000
212#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
213 PIN_MODE_INPUT(GPIOH_OSC_OUT) | \
214 PIN_MODE_INPUT(2) | \
215 PIN_MODE_INPUT(3) | \
216 PIN_MODE_INPUT(4) | \
217 PIN_MODE_INPUT(5) | \
218 PIN_MODE_INPUT(6) | \
219 PIN_MODE_INPUT(7) | \
220 PIN_MODE_INPUT(8) | \
221 PIN_MODE_INPUT(9) | \
222 PIN_MODE_INPUT(10) | \
223 PIN_MODE_INPUT(11) | \
224 PIN_MODE_INPUT(12) | \
225 PIN_MODE_INPUT(13) | \
226 PIN_MODE_INPUT(14) | \
228#define VAL_GPIOH_OTYPER 0x00000000
229#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
230#define VAL_GPIOH_PUPDR (PIN_PUDR_FLOATING(GPIOH_OSC_IN) | \
231 PIN_PUDR_FLOATING(GPIOH_OSC_OUT) | \
232 PIN_PUDR_PULLUP(2) | \
233 PIN_PUDR_PULLUP(3) | \
234 PIN_PUDR_PULLUP(4) | \
235 PIN_PUDR_PULLUP(5) | \
236 PIN_PUDR_PULLUP(6) | \
237 PIN_PUDR_PULLUP(7) | \
238 PIN_PUDR_PULLUP(8) | \
239 PIN_PUDR_PULLUP(9) | \
240 PIN_PUDR_PULLUP(10) | \
241 PIN_PUDR_PULLUP(11) | \
242 PIN_PUDR_PULLUP(12) | \
243 PIN_PUDR_PULLUP(13) | \
244 PIN_PUDR_PULLUP(14) | \
246#define VAL_GPIOH_ODR 0xFFFFFFFF
247#define VAL_GPIOH_AFRL 0x00000000
248#define VAL_GPIOH_AFRH 0x00000000
256#define VAL_GPIOI_MODER 0x00000000
257#define VAL_GPIOI_OTYPER 0x00000000
258#define VAL_GPIOI_OSPEEDR 0xFFFFFFFF
259#define VAL_GPIOI_PUPDR (PIN_PUDR_PULLUP(0) | \
260 PIN_PUDR_PULLUP(1) | \
261 PIN_PUDR_PULLUP(2) | \
262 PIN_PUDR_PULLUP(3) | \
263 PIN_PUDR_PULLUP(4) | \
264 PIN_PUDR_PULLUP(5) | \
265 PIN_PUDR_PULLUP(6) | \
266 PIN_PUDR_PULLUP(7) | \
267 PIN_PUDR_PULLUP(8) | \
268 PIN_PUDR_PULLUP(9) | \
269 PIN_PUDR_PULLUP(10) | \
270 PIN_PUDR_PULLUP(11) | \
271 PIN_PUDR_PULLUP(12) | \
272 PIN_PUDR_PULLUP(13) | \
273 PIN_PUDR_PULLUP(14) | \
275#define VAL_GPIOI_ODR 0xFFFFFFFF
276#define VAL_GPIOI_AFRL 0x00000000
277#define VAL_GPIOI_AFRH 0x00000000
279#if !defined(_FROM_ASM_)
void boardInit(void)
Board-specific initialization code.