rusEFI
The most advanced open source ECU
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blt_conf.h
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1/************************************************************************************//**
2* \file config/boards/microrusefi/openblt/blt_conf.h
3* \brief Bootloader configuration header file for rusEFI
4*----------------------------------------------------------------------------------------
5* C O P Y R I G H T
6*----------------------------------------------------------------------------------------
7* Copyright (c) 2021 by Andrey Gusakov https://rusefi.com/
8* Based on file:
9* Copyright (c) 2021 by Feaser http://www.feaser.com All rights reserved
10*
11*----------------------------------------------------------------------------------------
12* L I C E N S E
13*----------------------------------------------------------------------------------------
14* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
15* modify it under the terms of the GNU General Public License as published by the Free
16* Software Foundation, either version 3 of the License, or (at your option) any later
17* version.
18*
19* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
20* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
21* PURPOSE. See the GNU General Public License for more details.
22*
23* You have received a copy of the GNU General Public License along with OpenBLT. It
24* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
25*
26* \endinternal
27****************************************************************************************/
28#ifndef BLT_CONF_H
29#define BLT_CONF_H
30
31#include "efi_blt_ids.h"
32
33/****************************************************************************************
34* C P U D R I V E R C O N F I G U R A T I O N
35****************************************************************************************/
36/* To properly initialize the baudrate clocks of the communication interface, typically
37 * the speed of the crystal oscillator and/or the speed at which the system runs is
38 * needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
39 * BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
40 * not dependent on the targets architecture, the byte ordering needs to be known.
41 * Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects big endian mode and 0 selects
42 * little endian mode.
43 *
44 * Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
45 * called the moment the user program is about to be started. This could be used to
46 * de-initialize application specific parts, for example to stop blinking an LED, etc.
47 */
48
49/** \brief Frequency of the external crystal oscillator. */
50#define BOOT_CPU_XTAL_SPEED_KHZ (1000)
51/** \brief Desired system speed. */
52#define BOOT_CPU_SYSTEM_SPEED_KHZ (1000)
53/** \brief Motorola or Intel style byte ordering. */
54#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
55/** \brief Enable/disable hook function call right before user program start. */
56#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
57
58
59/****************************************************************************************
60* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
61****************************************************************************************/
62/* The USB communication interface is selected by setting the BOOT_COM_USB_ENABLE
63 * configurable to 1. The maximum amount of data bytes in a message for data transmission
64 * and reception is set through BOOT_COM_USB_TX_MAX_DATA and BOOT_COM_USB_RX_MAX_DATA,
65 * respectively.
66 *
67 */
68/** \brief Enable/disable USB transport layer. */
69#define BOOT_COM_USB_ENABLE (0)
70/** \brief Configure number of bytes in the target->host data packet. */
71#define BOOT_COM_USB_TX_MAX_DATA (63)
72/** \brief Configure number of bytes in the host->target data packet. */
73#define BOOT_COM_USB_RX_MAX_DATA (63)
74
75/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
76 * configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
77 * in bits/second. Two CAN messages are reserved for communication with the host. The
78 * message identifier for sending data from the target to the host is configured with
79 * BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
80 * BOOT_COM_CAN_RXMSG_ID. Note that an extended 29-bit CAN identifier is configured by
81 * OR-ing with mask 0x80000000. The maximum amount of data bytes in a message for data
82 * transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
83 * BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
84 * than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
85 * CAN controller channel.
86 *
87 */
88/** \brief Enable/disable CAN transport layer. */
89#define BOOT_COM_CAN_ENABLE (1)
90/** \brief Configure number of bytes in the target->host CAN message. */
91#define BOOT_COM_CAN_TX_MAX_DATA (8)
92
93/** \brief Configure number of bytes in the host->target CAN message. */
94#define BOOT_COM_CAN_RX_MAX_DATA (8)
95/** \brief Select the desired CAN peripheral as a zero based index. */
96#ifndef BOOT_COM_CAN_CHANNEL_INDEX
97#define BOOT_COM_CAN_CHANNEL_INDEX (0)
98#endif /* BOOT_COM_CAN_CHANNEL_INDEX */
99
100/* The RS232 communication interface is selected by setting the BOOT_COM_RS232_ENABLE
101 * configurable to 1. Configurable BOOT_COM_RS232_BAUDRATE selects the communication speed
102 * in bits/second. The maximum amount of data bytes in a message for data transmission
103 * and reception is set through BOOT_COM_RS232_TX_MAX_DATA and BOOT_COM_RS232_RX_MAX_DATA,
104 * respectively. It is common for a microcontroller to have more than 1 UART interface
105 * on board. The zero-based BOOT_COM_RS232_CHANNEL_INDEX selects the UART interface.
106 *
107 */
108/** \brief Enable/disable UART transport layer. */
109#ifndef BOOT_COM_RS232_ENABLE
110#define BOOT_COM_RS232_ENABLE (1)
111#endif
112/** \brief Configure the desired communication speed. */
113#define BOOT_COM_RS232_BAUDRATE (115200)
114/** \brief Configure number of bytes in the target->host data packet. */
115#define BOOT_COM_RS232_TX_MAX_DATA (200)
116/** \brief Configure number of bytes in the host->target data packet. */
117#ifndef BOOT_COM_RS232_RX_MAX_DATA
118#define BOOT_COM_RS232_RX_MAX_DATA (200)
119#endif
120
121/** only USB supported, this is ignored but required */
122#define BOOT_COM_RS232_CHANNEL_INDEX 0
123
124
125/****************************************************************************************
126* B A C K D O O R E N T R Y C O N F I G U R A T I O N
127****************************************************************************************/
128/* It is possible to implement an application specific method to force the bootloader to
129 * stay active after a reset. Such a backdoor entry into the bootloader is desired in
130 * situations where the user program does not run properly and therefore cannot
131 * reactivate the bootloader. By enabling these hook functions, the application can
132 * implement the backdoor, which overrides the default backdoor entry that is programmed
133 * into the bootloader. When desired for security purposes, these hook functions can
134 * also be implemented in a way that disables the backdoor entry altogether.
135 */
136/** \brief Enable/disable the backdoor override hook functions. */
137#define BOOT_BACKDOOR_HOOKS_ENABLE (1)
138
139
140/****************************************************************************************
141* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
142****************************************************************************************/
143/* The NVM driver typically supports erase and program operations of the internal memory
144 * present on the microcontroller. Through these hook functions the NVM driver can be
145 * extended to support additional memory types such as external flash memory and serial
146 * eeproms. The size of the internal memory in kilobytes is specified with configurable
147 * BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can
148 * be overridden with a application specific method by enabling configuration switch
149 * BOOT_NVM_CHECKSUM_HOOKS_ENABLE.
150 */
151/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */
152#define BOOT_NVM_HOOKS_ENABLE (0)
153/** \brief Configure the size of the default memory device (typically flash EEPROM). */
154#define BOOT_NVM_SIZE_KB (2048)
155/** \brief Enable/disable hooks functions to override the user program checksum handling. */
156#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
157
158/****************************************************************************************
159* W A T C H D O G D R I V E R C O N F I G U R A T I O N
160****************************************************************************************/
161/* The COP driver cannot be configured internally in the bootloader, because its use
162 * and configuration is application specific. The bootloader does need to service the
163 * watchdog in case it is used. When the application requires the use of a watchdog,
164 * set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
165 * hook functions.
166 */
167/** \brief Enable/disable the hook functions for controlling the watchdog. */
168#define BOOT_COP_HOOKS_ENABLE (1)
169
170
171/****************************************************************************************
172* S E E D / K E Y S E C U R I T Y C O N F I G U R A T I O N
173****************************************************************************************/
174/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-
175 * rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming
176 * operations can be performed, access to this resource need to be unlocked.
177 * In the Microboot settings on tab "XCP Protection" you need to specify a DLL that
178 * implements the unlocking algorithm. The demo programs are configured for the (simple)
179 * algorithm in "libseednkey.dll". The source code for this DLL is available so it can be
180 * customized to your needs.
181 * During the unlock sequence, Microboot requests a seed from the bootloader, which is in
182 * the format of a byte array. Using this seed the unlock algorithm in the DLL computes
183 * a key, which is also a byte array, and sends this back to the bootloader. The
184 * bootloader then verifies this key to determine if programming and erase operations are
185 * permitted.
186 * After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()
187 * are called by the bootloader to obtain the seed and to verify the key, respectively.
188 */
189#define BOOT_XCP_SEED_KEY_ENABLE (0)
190
191#define BOOT_XCP_UPLOAD_ENABLE (0)
192
193#ifndef BOOT_BACKDOOR_ENTRY_TIMEOUT_MS
194// 500 ms is not enough for USB init but we hope is enough for CAN
195#define BOOT_BACKDOOR_ENTRY_TIMEOUT_MS (500)
196#endif
197
198
199#endif /* BLT_CONF_H */
200/*********************************** end of blt_conf.h *********************************/